#Design Verification Engineers & Leads – 5+ years
hashtag#Locations : Bangalore, Hyderabad, Chennai
hashtag#RTL Design Engineers & Leads
4–9 hashtag#years : Bangalore
9+ hashtag#years : Bangalore, Hyderabad, Chennai
hashtag#Skills : hashtag#ASIC Design, hashtag#SoC Integration, hashtag#LINT, hashtag#CDC
hashtag#Analog Layout Engineers & Leads – 4+ years (Bangalore)
hashtag#Memory Layout Engineer – 4+ years (Bangalore)
hashtag#Memory Circuit Design Engineers & Leads – 4+ years (Bangalore)
hashtag#DFT Leads & Senior DFT Engineers – 8+ years (Bangalore)
hashtag#DV with hashtag#GLS Experience – 4+ years (Bangalore)
hashtag#DV with hashtag#NoC/SoC Experience – 3–5 years (Bangalore)
📧 Interested candidates can share their profiles directly to: